Data through FY2026 Q3 (Jun 30, 2026)
Digital Circuit Design Engineer
Occupation profile for Digital Circuit Design Engineer covers 44 filings across the reporting window. FY2026 certified median offer: $160,866.
- FY2026 certified median
- $160,866
- Total filings
- 44
- FY2026 25th–75th percentile
- $160,056–$170,225
- Top employer
- Apple Inc.
| Fiscal year | Filings | Median | 25th percentile | 75th percentile |
|---|---|---|---|---|
| FY2024 | 8 | $153,504 | $153,504 | $154,685 |
| FY2025 | 21 | $154,565 | $147,322 | $186,611 |
| FY2026 (Q1–Q3) | 15 | $160,866 | $160,056 | $170,225 |
FY2026 is partial (*). Its filing totals are not comparable to a full fiscal year.
Median offer by fiscal year
Top employers
- Apple Inc.44 filings
Top cities
- Santa Clara28 filings
- Austin9 filings
- West Lake Hills4 filings
- San Diego2 filings
- Beaverton1 filings
Filings by employer and title
Prevailing wages by area and occupation
The OFLC wage year runs from July through June. Worksites use the area of the most frequently reported county with a matching wage area for their city.
| Wage year | Area | SOC | Level I | Level II | Level III | Level IV |
|---|---|---|---|---|---|---|
| 2026-27 | San Jose-Sunnyvale-Santa Clara, CAArea 41940 | 17-2072 | $124,405 | $155,896 | $187,408 | $218,899 |
| 2026-27 | Austin-Round Rock-San Marcos, TXArea 12420 | 17-2072 | $100,131 | $126,235 | $152,360 | $178,464 |
| 2026-27 | Austin-Round Rock-San Marcos, TXArea 12420 | 17-2071 | $93,205 | $125,403 | $157,602 | $189,800 |
| 2026-27 | San Jose-Sunnyvale-Santa Clara, CAArea 41940 | 17-2071 | $130,686 | $159,890 | $189,072 | $218,275 |
| 2026-27 | San Diego-Chula Vista-Carlsbad, CAArea 41740 | 17-2072 | $107,765 | $131,622 | $155,501 | $179,358 |
| 2026-27 | Portland-Vancouver-Hillsboro, OR-WAArea 38900 | 17-2072 | $94,973 | $119,912 | $144,851 | $169,790 |
| 2026-27 | San Jose-Sunnyvale-Santa Clara, CAArea 41940 | 17-2061 | $152,173 | $180,294 | $208,437 | $236,558 |