H-1B Wage Lookup

Data through FY2026 Q3 (Jun 30, 2026)

FPGA Silicon Design Engineer

Occupation profile for FPGA Silicon Design Engineer covers 5 filings across the reporting window. FY2026 certified median offer: $178,035.

FY2026 certified median
$178,035
Total filings
5
FY2026 25th–75th percentile
$178,035–$178,035
Top employer
Altera Corporation
Certified offers by fiscal year
Fiscal yearFilingsMedian25th percentile75th percentile
FY20254$173,879$154,516$177,442
FY2026 (Q1–Q3)1$178,035$178,035$178,035

FY2026 is partial (*). Its filing totals are not comparable to a full fiscal year.

Median offer by fiscal year

Certified median offer, FPGA Silicon Design EngineerFY2025 $173,879; FY2026 (Q1–Q3) $178,035$0$60,000$120,000$180,000FY2025$173,879FY2026 (Q1–Q3)$178,035Certified median offer, FPGA Silicon Design EngineerFY2025 $173,879; FY2026 (Q1–Q3) $178,035$0$60k$120k$180kFY2025$173,879FY2026*$178,035
Certified H-1B LCAs, $15k–$2M, DOL OFLC

Top employers

  1. Altera Corporation5 filings

Top cities

  1. San Jose4 filings
  2. Milpitas1 filings

Filings by employer and title

    Prevailing wages by area and occupation

    The OFLC wage year runs from July through June. Worksites use the area of the most frequently reported county with a matching wage area for their city.

    Annual prevailing wage levels
    Wage yearAreaSOCLevel ILevel IILevel IIILevel IV
    2026-27San Jose-Sunnyvale-Santa Clara, CAArea 4194017-2072$124,405$155,896$187,408$218,899