H-1B Wage Lookup

Data through FY2026 Q3 (Jun 30, 2026)

FPGA Silicon Design Verification Engineer

Occupation profile for FPGA Silicon Design Verification Engineer covers 9 filings across the reporting window. FY2026 certified median offer: $183,230.

FY2026 certified median
$183,230
Total filings
9
FY2026 25th–75th percentile
$161,179–$216,091
Top employer
Altera Corporation
Certified offers by fiscal year
Fiscal yearFilingsMedian25th percentile75th percentile
FY20254$143,901$131,957$151,895
FY2026 (Q1–Q3)5$183,230$161,179$216,091

FY2026 is partial (*). Its filing totals are not comparable to a full fiscal year.

Median offer by fiscal year

Certified median offer, FPGA Silicon Design Verification EngineerFY2025 $143,901; FY2026 (Q1–Q3) $183,230$0$70,000$140,000$210,000FY2025$143,901FY2026 (Q1–Q3)$183,230Certified median offer, FPGA Silicon Design Verification EngineerFY2025 $143,901; FY2026 (Q1–Q3) $183,230$0$70k$140k$210kFY2025$143,901FY2026*$183,230
Certified H-1B LCAs, $15k–$2M, DOL OFLC

Top employers

  1. Altera Corporation9 filings

Top cities

  1. San Jose5 filings
  2. Austin2 filings
  3. Manteca1 filings
  4. Hillsboro1 filings

Filings by employer and title

  1. Altera Corporation · FPGA Silicon Design Verification Engineer9 filings

Prevailing wages by area and occupation

The OFLC wage year runs from July through June. Worksites use the area of the most frequently reported county with a matching wage area for their city.

Annual prevailing wage levels
Wage yearAreaSOCLevel ILevel IILevel IIILevel IV
2026-27San Jose-Sunnyvale-Santa Clara, CAArea 4194017-2072$124,405$155,896$187,408$218,899
2026-27Austin-Round Rock-San Marcos, TXArea 1242017-2072$100,131$126,235$152,360$178,464
2026-27Portland-Vancouver-Hillsboro, OR-WAArea 3890017-2072$94,973$119,912$144,851$169,790
2026-27Stockton-Lodi, CAArea 4470017-2072$115,211$146,827$178,464$210,080